Aubert. Image Credit: CEA-Leti
This proof-of-concept discovery shows that vertical transistors made of germanium tin are good candidates for high-performance chips and, perhaps, quantum computers.
Germanium–tin transistors display an electron mobility that is 2.5 times higher compared to a comparable transistor comprised of pure germanium. Otherwise, GeSn is consistent with the present CMOS process for chip fabrication.
As tin and germanium come from a similar periodic table group as silicon, such transistors can be combined instantly into traditional silicon chips with present production lines.
A recently reported study in Nature Communications Engineering, Vertical GeSn Nanowire MOSFETs for CMOS Beyond Silicon, notes “GeSn alloys offer a tunable energy bandgap by varying the Sn content and adjustable band off-sets in epitaxial heterostructures with Ge and SiGe. In fact, a recent report has shown that the use of Ge0.92Sn0.08 as source on top of Ge nanowires (NWs) enhances the p-MOSFET performances.”
“In addition to their unprecedented electro-optical properties, a major advantage of GeSn binaries is also that they can be grown in the same epitaxy reactors as Si and SiGe alloys, enabling an all-group IV optoelectronic semiconductor platform that can be monolithically integrated on Si,” reports the study.
The project research included contributions from various organizations besides CEA-Leti, which offered the epitaxial stacks. Epitaxy is performed on a highly ordered template, a silicon substrate, with a very accurate crystal structure. By altering the material, CEA-Leti duplicated its crystalline diamond structure in the layers that it put on top.
Epitaxy is the art of making multi-layers by duplicating the original structure and is performed at low temperature with gaseous precursors in a chemical vapor deposition (CVD) reactor.
Jean-Michel Hartmann, CEA Fellow and Team Leader, Group-IV Epitaxy, CEA-Leti
The deposition of this kind of stack and directing the epitaxial-layer growth is an extremely complicated step in a process flow that needs patterned cylinders and conformal gate stack deposition.
CEA-Leti is known to be one of the few RTOs throughout the world that has the potential to deposit such complicated in-situ doped Ge/GeSn stacks.
The collaboration demonstrated the potential of low-bandgap GeSn for advanced transistors with interesting electrical properties, such as high carrier mobilities in the channel, low operating voltages, and a smaller footprint.
Jean-Michel Hartmann, CEA Fellow and Team Leader, Group-IV Epitaxy, CEA-Leti
Hartmann added, “Industrialization is still far away. We are advancing on the state of the art and showing the potential of germanium tin as a channel material.”
Also, the work included researchers from ForschungsZentrum Jülich, Germany; the University of Leeds, United Kingdom; IHP- Innovations for High-Performance Microelectronics, Frankfurt (Oder), Germany; and RWTH Aachen University, Germany.
Journal Reference
Liu, M., et al. (2023) Vertical GeSn nanowire MOSFETs for CMOS beyond silicon. Communications Engineering. doi.org/10.1038/s44172-023-00059-2.